XilinxUnited States

XC95108-10PQ100I

CPLDs (Complex Programmable Logic Devices)

CPLD 108 MACROCELLS 2400 GATES 100PQFP

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Technical parameters

AC and DC characteristics
Pin-to-pin Logic Delay7.5 ns
Environment and package
Package100-pin PQFP
Other
f CNT125 MHz
Macrocells108
Program/Erase Cycles10,000
Usable Gates2,400
User I/O Pins108
V CCINT (Industrial)4.5 to 5.5 V
V CCIO (5V Operation)4.5 to 5.5 V

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DatasheetDatasheet · 114.0 KB · 2026-10-20
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