Skyworks Solutions Inc.United States
Si5383B Network Synchronizer Clock for SyncE, SONET/SDH/PDH, and IEEE 1588
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View full reportTechnical parameters
| AC and DC characteristics | |
|---|---|
| Input Frequency Max (MHz) | 750 |
| Input Frequency Min (MHz) | 0.000001 |
| Line Impedance Match | 0 |
| Loop Bandwidth Max (MHz) | 0.001 |
| Loop Bandwidth Min (MHz) | 0.004 |
| Output Frequency Max | 350 |
| Output Frequency Min | 0.000001 |
| Environment and package | |
| Package Size (mm) | 8x8 |
| Package Type | LGA56 |
| Temperature Range Max (°C) | 85 |
| Temperature Range Min (°C) | -40 |
| Other | |
| 4G/LTE Wireless Clocks | false |
| 56G SerDes | false |
| Clock Generators | false |
| Control | I2C |
| Description | 3-PLL Network Sync Clock |
| DSPLLs | 0 |
| Embedded Xtal | false |
| Intel x86 Clocks | false |
| Jitter Attenuating Clocks | true |
| Jitter Recommended Range (fs) | < |
| Number of Outputs | 7 |
| OPN | Si5383B-D00100-GM |
| Ouput Format(s) | CML; HCSL; LVCMOS; LVDS; LVPECL |
| Output Bin | 5 - 9 |
| Output Format Categories | Differential; Single-Ended |
| PCI Express | false |
| Phase Jitter (ps RMS) | 0.15 |
| Real Time Clock | false |
| Reference Inputs | 5 |
| Spread Spectrum | false |
| Supported for New Designs | No |
| Synchronous Ethernet/1588 | true |
| VDDO (V) | 1.8; 2.5; 3.3 |
| VDD (V) | 1.8 3.3V |
Documents
DatasheetDatasheet · 1.4 MB · 2026-09-23User ManualUser Manual · 8.0 MB · 2026-09-23Application NoteApplication Note · 6.9 MB · 2026-09-23User ManualUser Manual · 4.2 MB · 2026-09-23Application NoteApplication Note · 1.9 MB · 2026-09-23Application NoteApplication Note · 1.3 MB · 2026-09-23Application NoteApplication Note · 946.7 KB · 2026-09-23Application NoteApplication Note · 869.2 KB · 2026-09-23Application NoteApplication Note · 519.8 KB · 2026-09-23
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