PB-FREE 98ASA01814D 32-PIN QFN

PB-FREE 98ASA01814D 32-PIN QFN

NXP SemiconductorsNetherlands

SGTL5000XNAA3R2

CODECS32 Punch QFN

AUDIO CODEC STEREO LOW POWER 32-QFN

NXP SGTL5000XNAA3R2 is a low-power stereo audio codec with integrated headphone amplifier, supporting 1.62V to 3.6V supply, in a 32-pin QFN package, featuring I2S interface and internal PLL.Checked against the datasheet

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Technical parameters

Datasheet-verified parameters

22 items
ParameterValue and test conditionsSource
Package32 Punch QFN
Temperature Range (TA)-40 to 85 °C
PB-FREEPB-FREE
Analog Supply Voltage (VDDA)1.62 to 3.6 V
Digital I/O Voltage (VDDIO)1.62 to 3.6 V
Digital Voltage (VDDD)1.1 to 2.0 V
HP Output Max Power62.5 mW max, 1.02 kHz sine into 16 Ω load at 3.3 V
ADC SNR85 dB SNR (-60 dB input) and -73 dB THD+N (VDDA = 1.8 V)
DAC SNR100 dB SNR (-60 dB input) and -80 dB THD+N (VDDA = 1.8 V, 16 Ω load, DAC to headphone)
LINEOUT SNR100 dB SNR (-60 dB input) and -85 dB THD+N (VDDIO = 3.3 V)
LINEIN Input LevelMax 2.83 VPP (3.3 V VDDA); Max 1.60 VPP (1.8 V VDDA)
MIC Input LevelMax 2.83 VPP (3.3 V VDDA); Max 1.60 VPP (1.8 V VDDA)
LINEIN Input ImpedanceTyp 29 kΩ
MIC Input ImpedanceTyp 2.9 kΩ
LINEOUT Output ImpedanceTyp 320 Ω
LINEOUT LoadMin 10 kΩ
HP (headphone) LoadMin 16 Ω
SYS_MCLK Input Voltage swingMin -0.3 V, Typ VDDIO, Max VDDIO+0.3 V
SYS_MCLK Rise/Fall TimeMin 0.5 ns, Max 10 ns
PLL Input Clock Range8.0 MHz to 27 MHz
Mic Bias Voltage1.25 V to 3.00 V in 0.25 V steps
Mic Gain0 dB, +20 dB, +30 dB, +40 dB
All parameters (9)ExpandCollapse
Power
Analog Supply Voltage1.62 to 3.6 V
Digital I/O Voltage1.62 to 3.6 V
AC and DC characteristics
ADC THD+N-73 dB
HP Output THD+N-80 dB
Environment and package
Package32 Punch QFN
Temperature Range (TA)-40 to 85 °C
Other
ADC SNR85 dB
HP Output62.5 mW max
HP Output SNR100 dB

Pinout and package

Package32 Punch QFN

PinNameFunctionSource
1HP_R, Right headphone output
2GND, Ground
3HP_VGND, Headphone virtual ground
4VDDA, Analog voltage
5HP_L, Left headphone output
6AGND, Analog Ground
7NC, No Connect
8NC, No Connect
9NC, No Connect
10VAG, DAC VAG filter
11LINEOUT_R, Right LINEOUT
12LINEOUT_L, Left LINEOUT
13LINEIN_R, Right LINEIN
14LINEIN_L, Left LINEIN
15MIC, Microphone input
16MIC_BIAS, Mic bias
17NC, No Connect
18CPFILT, Charge Pump Filter
19NC, No Connect
20VDDIO, Digital I/O voltage
21SYS_MCLK, System master clock
22NC, No Connect
23I2S_LRCLK, I2S frame clock
24I2S_SCLK, I2S bit clock
25I2S_DOUT, I2S data output
26I2S_DIN, I2S data input
27CTRL_DATA, I2C Mode: Serial Data (SDA); SPI Mode: Serial Data Input (MOSI)
28NC, No Connect
29CTRL_CLK, I2C Mode: Serial Clock (SCL); SPI Mode: Serial Clock (SCK)
30VDDD, Digital voltage
31CTRL_ADR0_CS, I2C Mode: I2C Address Select 0; SPI Mode: SPI Chip Select
32CTRL_MODE, Mode select for I2C or SPI; When pulled low the control mode is I2C, when pulled high the control mode is SPI
PADGND, Ground

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DatasheetDatasheet · 177.9 KB · 2026-11-09DatasheetDatasheet · 2.0 MB · 2026-10-30
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