Figure 2. Pin configuration fo…

P82B96DP

Signal Buffers, Repeaters, SplittersTSSOP8

IC BUS BUFFER DUAL BIDIR 8-TSSOP

P82B96DP is a bidirectional I2C bus buffer with 2V to 15V supply voltage, 400kHz operation, TSSOP8 package, featuring ESD protection and latch-up immunity.Checked against the datasheet

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Technical parameters

Datasheet-verified parameters

16 items

Parameter	Value and test conditions	Source
Package	TSSOP8 (SOT505-1)
Operating temperature	Tamb = -40 °C to +85 °C
Supply voltage	Min 2.0 V, Max 15 V (operating)
Supply current	Typ 0.9 mA, Max 1.8 mA (buses HIGH, VCC=5V, Tamb=+25°C); Max 3 mA (Tamb=-40°C to +125°C)
Maximum input/output voltage	Max 15 V (open-collector; I2C-bus and VRx, VRy=HIGH)
Static output loading	Min 0.2 mA, Max 3 mA (VSx, VSy=1.0 V; VRx, VRy=LOW)
Dynamic output sink capability	Typ 18 mA, Min 7 mA (VSx, VSy=2 V; VRx, VRy=LOW)
Static output loading on buffered bus	Max 30 mA (VTx, VTy=0.4 V; VSx, VSy=LOW on I2C-bus = 0.4 V)
Dynamic output sink capability, buffered bus	Typ 100 mA, Min 60 mA (VTx, VTy>1 V; VSx, VSy=LOW on I2C-bus = 0.4 V)
Output logic level LOW	Min 0.8 V, Typ 0.88 V, Max 1.0 V (ISx, ISy=3 mA)
Input logic voltage LOW	Typ 640 mV, Max 600 mV (on normal I2C-bus)
Input logic level HIGH threshold	Min 700 mV, Typ 650 mV (on normal I2C-bus)
Input capacitance	Max 7 pF (effective input capacitance of any signal pin)
ESD protection	Exceeds 3500 V HBM per JESD22-A114 and 1000 V CDM per JESD22-C101
Latch-up free	Yes (bipolar process with no latching structures)
Maximum operating frequency	400 kHz (over at least 20 meters of wire)

Pinout and package

Pin	Name	Function	Source
valueEn		positive supply voltage

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