Texas InstrumentsUnited States
IC REG CTRLR MULT TOP 10MSOP
LM3481 is a high-efficiency low-side N-FET switching controller for Boost, SEPIC, and Flyback topologies with a 2.97V to 48V input range, 100kHz to 1MHz switching frequency, in a 10-pin VSSOP package with internal push-pull driverChecked against the datasheet
All alternatives
View full report3 alternatives on file. Sign in to view them.
Technical parameters
Key specs
TopologySEPIC
Outputs1
Input voltage2.97 ~ 48 V
Switching frequency100 kHz ~ 1 MHz
Datasheet-verified parameters
23 items| Parameter | Value and test conditions | Source |
|---|---|---|
| Topology | Boost, SEPIC, Flyback | |
| Outputs | 1 | |
| Supply Voltage | Min: 2.97V, Max: 48V | |
| Switching Frequency Range | Min: 100kHz, Max: 1000kHz | |
| Package | VSSOP (10) | |
| Junction Temperature Range | Min: -40°C, Max: 125°C |
All parameters (22)
| Power | |
|---|---|
| Voltage - Supply (Vcc/Vdd) | 2.97V ~ 48V |
| AC and DC characteristics | |
| Frequency - Switching | 100kHz ~ 1MHz |
| Environment and package | |
| Mounting Type | Surface Mount |
| Operating Temperature | -40°C~125°C(TJ) |
| Package | Tape & Reel (TR); Cut Tape (CT); Digi-Reel® |
| Package / Case | 10-TFSOP, 10-MSOP (0.118", 3.00mm Width) |
| Supplier Device Package | 10-VSSOP |
| Other | |
| Base Product Number | LM3481 |
| Clock Sync | Yes |
| Control Features | Enable, Frequency Control, Ramp, Soft Start |
| Duty Cycle (Max) | 85% |
| Function | Step-Up, Step-Up/Step-Down |
| Mfr | Texas Instruments |
| Number of Outputs | 1 |
| Output Configuration | Positive |
| Output Phases | 1 |
| Output Type | Transistor Driver |
| Product Status | Active |
| Serial Interfaces | - |
| Series | - |
| Synchronous Rectifier | No |
| Topology | Boost, Flyback, SEPIC |
Pinout and package
Figure 4-1. 10-Pin VSSOP Packa…
| Pin | Name | Function | Source |
|---|---|---|---|
| 1 | ISEN: Current sense input pin. Voltage generated across an external sense resistor is fed into this pin. | ||
| 2 | UVLO: Under voltage lockout pin. A resistor divider from VIN to ground is connected to the UVLO pin. The ratio of these resistances determine the input voltage which allows switching and the hysteresis to disable switching. | ||
| 3 | COMP: Compensation pin. A resistor and capacitor combination connected to this pin provides compensation for the control loop. | ||
| 4 | FB: Feedback pin. Inverting input of the error amplifier. | ||
| 5 | AGND: Analog ground pin. Internal bias circuitry reference. Should be connected to PGND at a single point. | ||
| 6 | FA/SYNC/SD: Frequency adjust, synchronization, and shutdown pin. A resistor connected from this pin to ground sets the oscillator frequency. An external clock signal at this pin will synchronize the controller to the frequency of the clock. A high level on this pin for ≥ 30 μs will turn the device o | ||
| 7 | PGND: Power ground pin. External power circuitry reference. Should be connected to AGND at a single point. | ||
| 8 | DR: Drive pin of the IC. The gate of the external MOSFET should be connected to this pin. | ||
| 9 | VCC: Driver supply voltage pin. A bypass capacitor must be connected from this pin to PGND. Do not bias externally. | ||
| 10 | VIN: Power supply input pin. |
Documents
Datasheet-verified content is extracted by AI from the manufacturer datasheet. Click a page number to view the original.