JFMP130

FPGAs (Field Programmable Gate Array)FCFBGA324

28nm High-Performance Low-Power FPGA, 132K Logic Cells, 8-Channel 12.5Gbps UHST Transceivers, Supports SM4 National CryptographyChecked against the datasheet

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Technical parameters

Key specs

Logic elements132 ~ 160

I/O count300

Core voltage970 mV ~ 1.03 V

Datasheet-verified parameters

15 items

Parameter	Value and test conditions	Source
Logic Cell	132,160 LU
DSP Slice	320
Block RAM	175 HRAM
User I/O	300
I/O Voltage Standards	1.2/1.5/1.8/2.5/3.3V，支持差分 LVDS
High-Speed Transceivers	8 通道 UHST，0.5~12.5Gbps
PCIe Hard IP	1 个 PCIe 2.1 硬核，支持 Gen1/Gen2 X1~X8
DDR3 Interface	支持，最高 1066Mbps
Core Voltage	0.97~1.03V（Typ 1.00V）
Auxiliary Power	1.71~1.89V（Typ 1.80V）
I/O Bank Voltage Range	1.14~3.465V（VCCP）
Operating Temperature (Commercial)	-40~+105℃
Package	FCFBGA324，15×15mm，0.8mm 间距
Encryption Security	支持 SM4 国密与 AES 加密
Process	28nm

Documents

DatasheetDatasheet · 8.6 MB · 2026-10-06

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