Ceramic surface-mounted packag…

BLF6G21-10G

Power LDMOS transistor

10 W LDMOS power transistor for base station applications at frequencies from HF to 2200 MHz, SOT538A ceramic surface-mounted package, integrated ESD protection, RoHS compliant.Checked against the datasheet

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Technical parameters

Key specs

Collector-emitter voltage65 V

Power10 WMax

Datasheet-verified parameters

15 items

Parameter	Value and test conditions	Source
Type	LDMOS power transistor
drain-source voltage	Max 65 V
Power	10 W
Package	SOT538A; ceramic surface-mounted package; 2 leads
storage temperature	Min -65 °C; Max +150 °C
junction temperature	Max 225 °C
gate-source voltage	Min -0.5 V; Max +13 V
thermal resistance from junction to case	Typ 3.2 K/W (Tcase = 80 °C; PL(AV) = 11 W)
RoHS	Compliant to Directive 2002/95/EC
ESD protection	Integrated
Frequency range	HF to 2200 MHz
Gain (1-carrier W-CDMA)	19.3 dB (f=2110 to 2170 MHz; VDS=28 V; IDq=100 mA; Tcase=25 °C)
Efficiency (1-carrier W-CDMA)	31 % (f=2110 to 2170 MHz; VDS=28 V; IDq=100 mA; Tcase=25 °C)
Gain (2-carrier W-CDMA)	18.5 dB (f=2110 to 2170 MHz; VDS=28 V; IDq=100 mA; Tcase=25 °C)
Efficiency (2-carrier W-CDMA)	15 % (f=2110 to 2170 MHz; VDS=28 V; IDq=100 mA; Tcase=25 °C)

Pinout and package

PackageSOT538A; ceramic surface-mounted package; 2 leads

Pin	Name	Function	Source
1		drain
2		gate
3		source, connected to flange

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