Si5389D Network Synchronizer Clock for SyncE, SONET/SDH/PDH, and IEEE 1588
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| 交流 / 直流特性 | |
|---|---|
| Frequency Reference | External |
| Input Frequency Max (MHz) | 750 |
| Input Frequency Min (MHz) | 0.000001 |
| Line Impedance Match | 0 |
| Loop Bandwidth Max (MHz) | 0.001 |
| Loop Bandwidth Min (MHz) | 0.004 |
| Output Frequency Max | 350 |
| Output Frequency Min | 0.000001 |
| Xtal Input Frequency | 48 |
| 环境与封装 | |
| Package Size (mm) | 9x9 |
| Package Type | LGA64 |
| Temperature Range Max (°C) | 85 |
| Temperature Range Min (°C) | -40 |
| 其他 | |
| 4G/LTE Wireless Clocks | false |
| 56G SerDes | false |
| Clock Generators | false |
| Control | SPI |
| Description | 3-PLL Network Synchronizer clock for IEEE 1588v2 |
| DSPLLs | 3 |
| Embedded Xtal | true |
| Intel x86 Clocks | false |
| Jitter Attenuating Clocks | true |
| Jitter Recommended Range (fs) | < |
| Number of Outputs | 8 |
| OPN | Si5389D-A00001-GM |
| Ouput Format(s) | CML; HCSL; LVCMOS; LVDS; LVPECL |
| Output Format Categories | Differential; Single-Ended |
| PCI Express | false |
| Phase Jitter (ps RMS) | 0.105 |
| Real Time Clock | false |
| Reference Inputs | 5 |
| Spread Spectrum | false |
| Standards Compliance | G.8373.2 T-BC T-TSC, G.8262 EEC Option 1 |
| Supported for New Designs | No |
| Synchronous Ethernet/1588 | true |
| VDDO (V) | 3.3 |
| VDD (V) | 1.8 3.3 |